Forum Discussion

Contributor

2 years ago

Cyclone 10 GX dev kit, which signal can I use to reset a NIOS?

I've had a look at the Cyclone 10 GX dev kit user manual and schematics but it's not clear if the board provides a signal to the C10 that will drive the NIOS platform reset input correctly. Any sugge...

Fpga Devkit

wwanalim_intel

Contributor

2 years ago

Hi,

Thank you for reaching us.

You can enable Include cpu_resetrequest, and use a PIO IP as input into cpu_resetrequest.

Or, with the connection below made, use the debug module to reset the core only.

If the same signal is connected to other IP's reset, you can extend to full system reset.

You also can refer below link about this.

https://www.intel.com/content/www/us/en/docs/programmable/683836/current/reset-and-debug-signals.html

Regards,

Forum Discussion

Cyclone 10 GX dev kit, which signal can I use to reset a NIOS?

Recent Discussions

Cyclone 10 LP Evaluation Kit - Documentation

AGILEX 5 cvp mode

Arrow AXE5 Eagle Board JTAG issue

PDN file and PCB decoupling

PCIe Example Design for Arrow EAGLE Board