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manishkumar's avatar
manishkumar
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2 years ago

Cyclone® V FPGA – Remote System Upgrade over UART Based on Nios® II Processors with EPCQ Design Exam

with given reference design example try to program the output_file.jic file through Quartus prime programmer as per the reference user manual in to the (Cyclone V E FPGA Development Kit) , but it is...
Fpga Devkit
NurAiman_M_Intel's avatar
NurAiman_M_Intel
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2 years ago

Hi,


  1. The flash on the devkit is correct.
  2. For the error, please try to program the Cyclone V only by using JTAG not .jic. Disable other devices, only program Cyclone V. Does it work?

Regards,

Aiman


manishkumar's avatar
manishkumar
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2 years ago

Hi,

with cycloneV only and disable all other devices:
1) through Jtag able to program .sof image, previously also able to program .sof image without disabling other devices
2) through jtag not able to program .jic image, getting silicon id error (screenshot attached)

kindly provide the solution to program .jic image through jtag