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Pochi's avatar
Pochi
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1 year ago

Cyclone® IV 　SDR SDRAM DDR2 Timing Parameter Settings

I found a document for DDR2 timing parameter settings, but I can't find anything for SDR. I would like to know the setting values of each parameter, so I would appreciate it if someone could help me....
Fpga Devkit
Pochi's avatar
Pochi
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1 year ago

Hi Adzim,

Thanks for your feedback.

Sorry for the lack of information.

I would like to know the upper and lower limits of each parameter that can be set in FPGA for memory selection.

Best regards,

Pochi