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Altera_Forum
Honored Contributor
Honored ContributorCyclon III dev board timing problem
Hello, I'm studying FPGAs by myself based on books and the literature available on the Altera website. I bought a Cyclone III Nios II evaluation kit, I experimented with all the example design...
Altera_ForumHonored Contributor
Honored Contributorthe LCD data looks like it goes through a MAX II device where its demuxed and send to the LCD. you'll want to get setup and hold information for the MAX II RGB inputs and use those for your set input and output delays.
this thread has some useful information, the attachment by gee: http://www.alteraforum.com/forum/showthread.php?t=2328
