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... am more inclined to the usage of the SRAM, is there any tutorial on how to do this(for example how to use SRAM to read the GPIO inputs in quartus, how to connect the SRAM to the PIO, I found some information about the PIO at
johnloomis.org/NiosII/pio/PIO_Core.html).
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Create an instance of a single-port RAM component, and then create a testbench to read and write to it. Then create a dual-port version. That'll help you get the hang of the components.
Typically I'll use the MegaWizard to create a component, then look inside the created logic. If the MegaWizard has just created a wrapper over something simple (in this case an altsyncram), then I just pull the altsyncram out, and re-work it so that the generics are grouped nicely. You'll see what I mean when you generate some RAMs.
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I was currently using std_logic_vector(with the coefficients modeled by 0 1 Z)
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If Z is supposed to be used internal to the FPGA, then no, you don't want to use it, use 00b, 01b, 10b (or 11b) for your three state logic.
For some of your other questions, you need to look at other peoples code to see how they've solved problems. This tutorial has some VHDL that might use some of the language features you need:
http://www.ovro.caltech.edu/~dwh/correlator/pdf/lfsr_tutorial.pdf http://www.ovro.caltech.edu/~dwh/correlator/pdf/lfsr_tutorial_src.zip Cheers,
Dave
Honored Contributor
