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kiransr's avatar
kiransr
Icon for Occasional Contributor rankOccasional Contributor
1 year ago

Configuring Stratix 10 SOC FPGA

Is it possible to program the Stratix 10 SOC FPGA present in the Stratix 10 SX SOC Devlopment kit without any firmware and HPS FSBL / SSBL.

What I mean is programing FPGA only with hardware sram object file (.sof) file generated from the Quartus prime pro tool.

6 Replies

  • sstrell's avatar
    sstrell
    Icon for Super Contributor rankSuper Contributor

    Yes. All FPGAs, whether SoC variants or not, can be programmed using the standard JTAG connection. You're just not booting the processor when you do this.

  • tehjingy_Altera's avatar
    tehjingy_Altera
    Icon for Regular Contributor rankRegular Contributor

    Hi


    Yes, you are able to program the FPGA configuration only without the HPS.

    In your Quartus project, you could just skip adding the HPS Hard IP into your project.


    Regards

    Jingyang, Teh


    • kiransr's avatar
      kiransr
      Icon for Occasional Contributor rankOccasional Contributor

      Hi Jingyang Teh,

      Thank you for the answer.

      I need a clarification, in quartus where there is only hardware project no processor (hard / soft), once it's compiled and assembler generates a .sof file, only using this file in quartus programmer in the JTAG mode FPGA can be programmed is that right.

      No need of converting this .sof file to any other format, it can be used as is for configuring FPGA through JTAG in FPGA first boot mode, is this correct step or not please advise.

      Regards,

      Kiran

    • kiransr's avatar
      kiransr
      Icon for Occasional Contributor rankOccasional Contributor

      Hi Jingyang,

      Thank you for the answer,

      I have .sof file generated from quartus prime pro tool, just using micro usb jtag port on the stratix10 soc fpga development kit am unable to program, how it can be done, let me know.

      Regards,

      Kiran

  • FvM's avatar
    FvM
    Icon for Super Contributor rankSuper Contributor

    Hi,

    .sof configures FPGA only volatilely, for permanent storage, configuration must be stored in flash, using .jic (serial flash) or .pof (parallel flash).

  • tehjingy_Altera's avatar
    tehjingy_Altera
    Icon for Regular Contributor rankRegular Contributor

    Hi


    I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, Please login to ‘https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


    Regards

    Jingyang, Teh