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Altera_Forum's avatar
Altera_Forum
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16 years ago

Communication problems for Cyclone III development kits

I am new to the world of Altera. Really hope to get some helps from this forum.

Thanks in advance!

My case is:

with two Cyclone III development kits. I need to implement some baseband algorithm onto it to protyping a wireless communication system. (I need to design RF part seperatly).

The first question is:

I need to go through the data flow firstly. i need to let my board to read/write data from/to pc or another board. What is the easiest way to do that?

I know with the kit, I already have usb/ethernet ports on board, are them ready to do this job, or what else do I need?

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    16 years ago

    @uelee,

    --- Quote Start ---

    i need to let my board to read/write data from/to pc or another board. What is the easiest way to do that?

    I know with the kit, I already have usb/ethernet ports on board, are them ready to do this job, or what else do I need?

    --- Quote End ---

    What specific boards do you actually have? The communication possibilities of course depend on this. What is the speed at which you want to communicate?

    Generally speaking you can use the usb and the ethernet ports to communicate with your PC or another board.

    You can of course also use a UART for serial communication.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    16 years ago

    Hi sanmao, thank you for your reply. I am pleased to see your nickname & icon.

    the boards I am talking about is Cyclone III FPGA Development Kit.

    http://www.altera.com/products/devkits/altera/kit-cyc3.html

    I am working with a project to develop a wireless communication system. I need to implement the baseband algorithm on the Cyclone III FPGA Development board. For testing, I am going to build a communication path b/w PC & board, also b/w boards. I need some tech detail/documents/example codes/ref design to guide me to accomplish it. Can you give me more help to find out where should I go to find them. I am new to Altera FPGA, your help is greatly appreciated.