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Altera_Forum
Honored Contributor
Honored ContributorClock Issue For A Vga Controller
Hi, I'm trying to design an 640x480 VGA controller for which the simulation seems alright. However, when I program the CYCLONE || FPGA STARTER KIT, nothing appears on the screen. I suspec...
Altera_ForumHonored Contributor
Honored ContributorI have the same issue because with a PLL I cant get 25.175MHZ out of a 50MHZ clock.
It is not possible to divide more than by 5 the input freq.
