Clock Issue For A Vga Controller

hi

Are you sure the code below doesnt have a problemm!!

I am not suree about the real problem you are facing.. just a look at your code

made me to comment...

entity vga_ctrl is

port(

CLOCK_50 : out std_logic; -- Symbolic name for 50Mhz onboard 50 Mhz

-- clock

clock_in : inout std_logic; -- VGA controller clock input;

);

end vga_ctrl;

architecture behavior of vga_ctrl is

begin

clock_in <= CLOCK_50; -- Logically, this should work; but still, it

-- does'nt.

end behavior;

You have declared CLOCK_50 as OUT

and you are tryingg to assign it to clock_in.........