Forum Discussion
ymiler
Contributor
Contributorclock gated conversion
Hello, I'm running Quartus 22.3 building for an S10 FPGA. Since my FPGA is prototype, the project includes several clock gated to solve it I added the following command to the QSF : set_glob...
Adrien_Lacroix
New Contributor
New ContributorHello,
Thank you for your answer.
It could be really helpful if you notified me in this channel whenever you get an answer for your case.
