Forum Discussion

ymiler's avatar
ymiler
Icon for Contributor rankContributor
2 years ago

clock gated conversion

Hello, I'm running Quartus 22.3 building for an S10 FPGA. Since my FPGA is prototype, the project includes several clock gated to solve it I added the following command to the QSF : set_glob...
Fpga Devkit
RichardT_altera's avatar
RichardT_altera
Icon for Super Contributor rankSuper Contributor
2 years ago

Dropping a note to ask if my last reply was helpful to you?

Do you need any further assistance from my side?


Regards,

Richard Tan