AmirKhan
New Contributor
New ContributorChanging VCCIO voltages in DE0-Nano board
Hi, I need to test my ASIC which takes 1.2V and 3.3.V. I have designed my PCB without knowing much about the banks of FPGA. It certainly implies that I am a newbie in FPGA. I can manage this by cha...
- DE0-Nano manual and schematic drawing should be your first reference. It clarifies that all VCCIO pins are connected to 3.3V rail. Whatever you declare in pin planner, real VCCIO will be 3.3V.
Although officially unsupported, you can assign 2.5 V to a bank and use LVDS receivers, at least at reduced performance.
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