Forum Discussion
Altera_Forum
Honored Contributor
17 years agoRight. I think I suffered from the same confusion at first. Even though the SRAM chip may have a 0 ns setup, the signal still have to travel through IO buffers and PCB traces, so real-life setup is more than 0. For the similar reason, you can't run a 10 ns async SRAM at 100 MHz. However, for _synchonous_ sram it's a different story.