Forum Discussion
MamaSaru
Occasional Contributor
6 years agoI have solved by myself.
I would share my study.
1. Select Passive Parallel x16 for compilation.
2. Select CFI_2Gb for flash size on convert programming file.
We should enter the total size.
3. Option bit should locate on 0x30000 for convert programming file
this information comes from system_max10 design. The folder name
system_max10 is not proper indeed!
It should be configuration_max10 like that.
Hello Intel FPGA, please revise the development kit doccumentation including this info.