Forum Discussion
Altera_Forum
Honored Contributor
11 years agoWhich reminds me, I was going to upload a new zip file with an improved basic example and DDR example. Read the readme.txt files in the respective example directories, eg., bemicro_cv/basic/readme.txt is
Arrow/Altera BeMicro-CV Development Kit
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6/23/2014 D. W. Hawkins (dwh@ovro.caltech.edu)
This 'basic' design blinks the LEDs on the development kit.
To rebuild the design
1. Unzip the example source, eg., into
C:\temp\bemicro_cv
2. Start Quartus
3. Select the Tcl console
(if its not visible, select View->Utility Windows->Tcl Console)
4. Change directory to the top-level of the example
tcl> cd {C:\temp\bemicro_cv\basic}
5. Source the synthesis Tcl script
tcl> source scripts/synth.tcl
The console will output the following messages ...
Synthesizing the BeMicro-CV 'basic' design
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- Quartus Version 13.1.4 Build 182 03/12/2014 SJ Full Version
- Creating the Quartus work directory
* C:/Temp/bemicro_cv/basic/qwork
- Create the project 'bemicro_cv'
* create a new bemicro_cv project
- Creating the VHDL files list
- Applying constraints
- Processing the design
- Processing completed
6. You can now use the built-in JTAG programmer to download the design.
The DDR readme.txt shows how to create the DDR instance, how to run the External Memory Interface Toolkit, and how to access the DDR via JTAG. Cheers, Dave