Audio Video Development Kit

I don't know, if device 1 is actually the MAX II in JTAG chain? The error may also occur, cause you tried to connect the wrong device for PFL programming.

I didn't check, if the MAX II design or image is contained in the Dev Kit files somewhere. Normally at least, a *.pof image should be provided. I don't use the Dev Kit, I included MAX II PFL with own designs. But I know from other Altera Dev Kits, that they likely utilize the reference design if applicable.

P.S.: I checked with Stratix IIGX PCIe Board reference manual. I see, that device 1 is actually the MAX II in JTAG chain. Also the previously asked flash address map is documented in the manual. I didn't see a notice which MAX II *.pof design is the factory configuration, that contains an operational PFL according to the manual, but it can be expected to be shipped with the Dev Kit. (Would be the first Dev Kit that lacks the basic image files otherwise).