Honored Contributor
Honored ContributorHello Johns,
I don't know the Arria GX Dev Kit in particular, I did a customer Arria design after some evaluation with a PLDA Stratix II GX board. But I would expect a complete documentation and software. That's why they call it a kit rather than only a evaluation board! May be something is missing or the board is faulty. I would expect pcie_ddr2_ref_dgn_arriagx to exactly fit the board. It has a JTAG chain definition with an EPM570 and an attached PFL instance for a 512MBit Flash, probably your target? Loading the reference design, you should be able to verify or restore the flash content with one click. There may be confiuration jumper or switch settings additionally necessary. Regards, Frank P.S.: I reviewed the reference manual from Dev. Kit literature page. The configuration procedure is discussed on Page 2-6ff. Basically you have to select the correct Arria configuration scheme (CFG-Mode "10", FPP with decompression, I think) and to include the MAX II in the JTAG chain by SW3. The MAX II and Flash *.pof files are included in the reference design, not at the location where the chain description references them, but in the pof folder.
