Arria 10 SoC Development Kit: IO standard used for CLK_HPSEMI_P/N

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Hi,

Thanks for the reply.

In the Development kit, the 2K bank is powered by the voltage needed for DDR version. If we use DDR4, then it will be powered by 1.2V. From the below image, HILOPHPS_VDD is powering the 2K bank. Also 2K bank is used for interfacing DDR. I have attached the development kit with this question.

Page no 62: HILOHPS_VDD is generated(it powers 2K bank)

These will set the HILOHPS voltage to either 1.2V,1.35V or 1.5V

In the development kit, there is a voltage mismatch between Clock generator Si5338B and Intel Arria 10 FPGA. Hence these two can't be logically compatible. What IO standard can then be used to make it logically compatible?

Thanks

Viswa