Occasional Contributor
Frequent ContributorHi,
Could you try this example design?
For more example design, you may go to our FPGA Design Store https://www.intel.com/content/www/us/en/support/programmable/support-resources/design-examples/design-store.html?q=niosV&s=Relevancy
Best regards,
zying
Occasional ContributorHello, I tried out the example design at
https://www.intel.com/content/www/us/en/design-example/784689/intel-arria-10-fpga-10gbase-kr-phy-ip-design-example.html
It failed to bring up a link at either 1G or 10G. Were you able to establish a link with this design for the Arria10 GX dev board?
If so please send me your archived project.
The only changes made to the example design were the pinouts to match the Dev board.
I am still in need of an example PHY that can bring up a link on this board using the SFP+ connector.
Thanks
