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ramsoffer_123's avatar
ramsoffer_123
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Arria 10 EMIF example design error

hi everyone, im using Arria 10 GX development kit. im trying to learn EMIF example design. im using ARRIA 10 GX development kit with DDR4 HILO preset. memory parameters: memory clock freq:1066.6...
Fpga Devkit
ramsoffer_123's avatar
ramsoffer_123
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

hi Adzim,

thank you for the fast answer.

i currently generated it from EMIF IP

Im using quartus 21.1-standard.

I didn't check it with BTS.

I generated the example design with the preset marked in the picture above.

then i performed synthesis with signal tap. and loaded the board.

hope you have enouth details.

BR,

Ram.