Forum Discussion
Arria 10 : data abort after DDR calibration
Hi,
Just to check, when using the DDR4 memory, were you able to boot the Arria 10 successfully?
Are you using the design from our GHRD?
Regards.
- PJais16 years ago
New Contributor
Hello,
I haven't designed using DDR4 as in our custom design DDR3 is connected at HPS side. Also , I am using the design from example design in SOC EDS embedded folder .
- PJais16 years ago
New Contributor
Hello,
In our design we did not had ECC enabled . You might check the design parameters in the quartus tool for the DDR used.
- EBERLAZARE_I_Intel6 years ago
Regular Contributor
Hi,
I've noticed you are using Early IO release feature. This means there should be two .rbf files needed, peripheral and core.
- EBERLAZARE_I_Intel6 years ago
Regular Contributor
I recommend that you refer the user guide to use Early IO release feature:
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an-a10-soc-fpga-early-io-release.pdf
Regards.