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Altera_Forum
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16 years ago

Application of SSTL-18 class1 on communication between FPGA&DDR2

Now I am design my development kit , the FPGA I am using is Stratix 2'S device EP2S180F1020C5N , I will use DDR2 soDIMM on my development . So , according to the Handbook , I must use the SSTL-18 cl...
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Altera_Forum
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16 years ago

In case of SSTL class 2, you have basically a two-sided termination. Board layout considerations may not allow a FPGA-side termination anyway. If termination mismatch and reflections are acceptable or not is mainly a matter of trace lengths and intended memory speed. Consult respective Altera application notes, particularly AN408 for a detailed discussion of expectable signal quality with different termination schemes.