TKunk1New Contributor7 years agoAN810 saws that the ADC and FPGA clocks need to be run off of the same source, different clocks. Why is this (clock drift, synchronization)? What clock source you used to drive the FPGA clock and the ADC Sample clock?
Recent DiscussionsAgilex 5 reconfigurable PLL - emifRegarding data for the Altera Arria V GX FPGA development kitAXC3000 Agilex 3 boardAccess to System MAX design for Agilex 5 kitSolvedAgilex7 m-series for llama