Forum Discussion
Altera_Forum
Honored Contributor
15 years agoDear FvM,
thank you for answering! Actually I asked Terasic (it was about 3 months ago), and got the following answer: > We are afraid all of DE3 design examples incorporate the Nios II processor into their design. It was not very helpful for me, because available examples: 1. works only with 1 GB, and the is no access to source or to Altmemddr to modify it to 4 Gb, 2. require NIOS, and it takes about 2MBit of M9K/M144K memory blocks that is unacceptable for my design. However, may be, in the mean time, Terasic has something new and I will definitely ask them again :) Would you please suggest me from what point to start in case if Terasic still has nothing for my case? I know that DDR2 is constructed with pages, generally I can implement it by myself, because I need only few amount of operations: 1. init one block for reading, 2. read the block, 3. close it, 4. recover blocks, 5. init one block for writing, 6. write the block, 7. close it. Actually I know the theory, but I did not implemented it yet, hence, any tips to do it will be very helpful! PS: indeed if somebody can share me module for Altmemddr it will be perfect and I will continue to work with my project. Sincerely, Ilghiz