AEsquContributor6 years agoaltera_reserved_tck hold timing violation In the help document: https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/solutions/rd10082012_359.html it is mentioned to set altera_reserved_tck on globa...Show More
KhaiChein_Y_IntelRegular Contributor6 years agoHi,Could you provide a small test case for investigation?Thanks.
Recent DiscussionsStratix III FPGA development kitARM DS5 debugger Access/Detection of CM55 on Agilex5 fpga deviceFPGA University Program: Donation Request [UPR-11537]Cyclone VGT Dev Kit boards - some new boards failing to boot from NOR FlashDK-DEV-AGI027RES Install Package