Hello Raju Satrasala,
I understand that you're facing issues with the Agilex 7 F-Series SOC Development Kit during the Linux boot-up process when using the provided prebuilt binaries for the PCIe Root Port reference design.
The error messages you've encountered suggest problems with the FPGA image or other script failures. Let's try to troubleshoot the issue:
FPGA Image Check:
- Verify that the FPGA image you're trying to load is not corrupted. Make sure it was built and programmed correctly. Check the bitstream file and its integrity.
SD Card Check:
- Ensure the SD card is properly inserted, and the files on it are not corrupted. You may want to reformat the SD card and copy the necessary files onto it again.
Boot Sequence:
- Double-check the boot sequence and configuration settings in the board's U-Boot environment. Ensure that the SD card is set as the primary boot device.
File Paths:
- The "Unable to read file /" error suggests that the bootloader can't find the necessary files. Verify that the file paths in your boot script are correctly configured.
Script and Environment Variables:
- Review the boot script and environment variables in U-Boot to make sure they are set up correctly. Ensure that the script points to the right locations for the FPGA image and other essential files.
If you have performed all the suggested tests and ensure that the file that you downloaded from Rocketboard is no problem, please talk with the developer.
I saw there is an open forum page in RocketBoard forum https://forum.rocketboards.org/t/agilex-error-sending-bitstream/3273 file by you as well.
Regards,
Wincent_Intel
Occasional Contributor
