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spectralsensors's avatar
spectralsensors
Icon for New Contributor rankNew Contributor
2 years ago

Agilex 7: Not able to access the FPGA fabric from HPS through light weight AXI bus

Hi, Objective: We are trying to access the FPGA fabric from the HPS region through the light weight AXI BUS. Issue: I am not able to access the address map 0xF900_0000. I am using the SOF from roc...
Fpga Devkit
tehjingy_Altera's avatar
tehjingy_Altera
Icon for Regular Contributor rankRegular Contributor
2 years ago

Hi Sanjat


Could you try out the "bridge" command to enable the bridge before trying to access the light weight bridge.


You could try out the command below:


bridge enable 0x2


This command will enable the light weight bridge.

You could understand more of the command by entering only the "bridge" command.


Regards

Jingyang, Teh



spectralsensors's avatar
spectralsensors
Icon for New Contributor rankNew Contributor
2 years ago

Hi Teh,

Thanks a lot for replying and the suggestion.

I did try the above command, but, it failed.

Before loading the .RBF file, I had ran the command "bridge disable"

SOCFPGA_AGILEX # bridge disable

FPGA not ready. Bridge reset aborted!

SOCFPGA_AGILEX # fpga load 0 ${loadaddr} ${filesize}

..FPGA reconfiguration OK!

SOCFPGA_AGILEX # bridge enable 0x2

Failed to enable the HPS bridges, error 4

SOCFPGA_AGILEX #

Kindly suggest what else should I do.

Best Regards,

Sanjat