Agilex 7 F-Tile PCIe MCDMA Debug Toolkit isn't working in Quartus® v23.4

Hi,

1. The sof file was created in Quartus 23.4 in a Linux server. If I use the Console version 23.4, will it solve it?
>> I am suggest you to regenerate the IP/Design in Quartus v24.2 and re-test the same sequence again.
>> Let me know if you are still seeing the same issue or linkup unstable.

2. In signal tap I see LTSSM state is L0 with occasionally going through a recovery sequence.
>> Can I know exactly what stage the Ltssm is looping at ? Can you please provide me the printscreen of the signaltap ?
>> or the hexa number of the ltssm will do.

3. I suspect a signal integrity issue and would like to check the Eye Diagram.

But the Console GUI states "ensure that LTSSM state = L0 before pressing the Start eye diagram".

I believe not being in L0 is one of the reasons one would want to observe the eye diagram.
>>One of the criteria to success start up the eyes test is to make sure the PCIe link is up.
>>The link status and ltssm can be checked by signaltap.
>> is this you own custom design ? or this is example design provided in our IP catalog ?
>> if you are using your custom make design, do appreciate if you can try out the example design and see if you monitor the same error or not.

Regards,

Wincent_Intel