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Nicole04
Occasional Contributor
Occasional ContributorAgilex 5 HSIO Bank Clocks
Good day, How can a 1.8V clock be connected to the HSIO banks? The Intel Agilex 5 Premium development kit seems to connect a few 1.8V LVDS clocks to HSIO banks powered at 1.1V or 1.2V (VCCIO_PIO). T...
AqidAyman_Altera
Regular Contributor
Regular ContributorHello Nicole,
From Si5332 clock gen datasheet, LVDS spec as below
Vcm = 0.8V
VPP_SE = 0.375V
VPP_SE --> Signal swing at HIGH -> 0.8 + (0.375/2) = 0.9875V.
That should be still within limit of HSIO pin.
