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robertzab's avatar
robertzab
Icon for New Contributor rankNew Contributor
1 year ago

Agilex 5 - JESD204B

Hello everyone,

I have a question regarding the new family of FPGA devices - Agilex5. I intend to purchase the MK-A5E065BB32AES1 DevKit:

https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/agilex/a5e065b-modular.html

I want to use the JESD204B interface for the converters. The only IP core I can use in the project is the GTS JESD204C Intel FPGA IP. Theoretically, the JESD204C interface is backward compatible with JESD204B.

However, in the documentation, I found the information that:

"The GTS JESD204C Intel® FPGA IP is a high-speed point-to-point serial interface intellectual property (IP). The GTS JESD204C Intel® FPGA IP is the latest IP from Intel that supports the GTS JESD204C protocol. This IP is not backward compatible and does not support JESD204B protocol."

On the other hand, all announcements for this device assumed backward compatibility with JESD204B.

My question is whether future Quartus updates will include the JESD204B IP core or if this A5ED065BB32AE6SR0 device will only support JESD204C?

Board Debug

2 Replies

  • Harshx's avatar
    Harshx
    Icon for Occasional Contributor rankOccasional Contributor
    1 year ago

    We sincerely apologize for the inconvenience caused by the delay in addressing your Forum queries. Due to an unexpected back-end issue in our system, your Forum case, did not reach us as intended. As a result, we have a backlog of cases that we are currently working through.

    Please be assured that we are doing everything we can to resolve this as quickly as possible. This will take some time, and we appreciate your patience and understanding during this period of time. Your case will be attended by AE soonest possible.

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