[ADC-SoC] the examples for that board collect 50K samples, as far as i understand due to the on-board memory limit. is it possible to collect to 5M samples (continuously) ?

Hi, thank you for your reply.

i have the ADC-SOC Board from Terasic with a Cyclone V SoC. Terasic provided an example for the two on-board high speed ADC. in this example they store the adc samples in the "on-chip memory".

my question is how can i use the sdram that is connected to the HPS side of the SOC to collect more samples. also what are the limitation of the direct accesses to the sdram when the sample rate is 100MSamples/sec.