About fpll recalibration failure problem of transceiver (simplex tx) under cyclone 10

Hi CheePin,

Just for your question, I make sure that 1,3,4 all are satisfy and for 2, step 1: get bus access; step 2: switch one reference clock to another reference clock; step 3: send recalibration command; step 4: release bus access; step 5: wait for the completion of recalibration.

For another thing, I try 3 boards(all same, except fpga chip), 2 boards work normally, and another usually has this problem.

Brs,

Lambert