Altera_ForumHonored Contributor12 years ago1.8V I/O for DDR Controller? (BeMicro SDK MDDR) The BeMicro SDK designs come with a Microtronix MDDR controller evaluation core. They use the 1.8V I/O standard, which allows them to use the thresh pin on the bank as the CS pin of the DDR. Wh...Show More
Altera_ForumHonored Contributor12 years ago --- Quote Start --- I did. Works just fine. --- Quote End --- Excellent, thanks for letting the forum know! Cheers, Dave
Recent DiscussionsCXL 2.0 support on the NEW Agilex™ 7 FPGA I-Series Development Kit (2x R-Tile and 1x F-Tile)Slow Runtime Performance in FIL Implementation on DE2-115 Using EthernetAgilex5 HPS2FPGA usageDevice stopped receiving config data: Internal error (0x0000, 0x00000000, 0x1800).Mandelbrot viewer on Cyclone V - Platform Designer layout