器件能承受的应力参数

Hi Huan,

Thank you for contacting Intel Community. First of all, I would like to clarify if you are looking for the maximum downward pressure that can be applied to the top of BGA as the solution link below?

https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/solutions/rd04172001_4367.html

In the meantime, users are recommended to follow the recommendation pad sizes for SMD and non-solder mask defined (NSMD) land patterns as stated in AN114, Table 3.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an114.pdf

We have done extensive modeling simulation and experimental studies to determine the optimum land pad design on the PCB to provide balanced stress on the solder joint and the best solder joint reliability. You may choose to use NSMD pads which the land pads can be approximately 15% smaller than the BGA pad size to achieve balanced stress on solder joints.

Thank you

Regards,

Chia Ling