Forum Discussion
That makes sense. I guess in that case the solution would be as simple as indicating AOC where the 19.3 version of the Arria 10 BSP is located, right? (which I don't know at the moment, by the way)
I am afraid not; if you want to use a bitstream compiled with a different BSP, then the FPGA must be configured with a bitstream compiled with that BSP through JTAG and the machine has to be rebooted. The static region of different BSPs are not compatible and you cannot partially reconfigure the FPGA with a bistream compiled with a BSP different from the one it is already configured with. Essentially, the only way to use v19.3 on the Devcloud right now is likely asking its admins to downgrade the FPGA firmware to v19.3, which would then mean people will not be able to use the system with v20.1 out of the box and I highly doubt they would want to do that. It is possible to use a newer version of the compiler with an older BSP through backward compatibility, but I am afraid it is not possible to use and older version of the compiler with a new BSP, which means you cannot use the v20.1 BSP with the v19.3 compiler to get around this problem, either. Your only choice is probably to get your design to work with v20.1.