Forum Discussion
Deshi_Intel
Regular Contributor
6 years agoHi Paul,
Cyclone V is legacy FPGA where the example design at that time frame was developed with VIP I version IP core only.
Now both FPGA products and VIP IP core have evolved over time for these few years.
- New FPGA example design development will automatically pair with latest VIP IP core.
- Unlikely there will be new example design development on older legacy FPGA product like Cyclone V
VIP II version IP core is typically upgraded version of VIP I version IP core.
- I won't really treat them as same design. This also explained why you are having hard time to match the parameter setting.
It's tough but appreciate your understanding on this issue.
Regards,
dlim
- PGigl6 years ago
Occasional Contributor
Ok, so I am punting on the Cyclone V reference design, and tried to open the UHD Video Reference Design which targets the Arria 10 GX.
I get a ton of errors when opening in the design in 19.1.
I am now trying to open Platform designer and update those to see if that will fix things. This is amazingly bad, as this is where we tell customers where to go to get started!!!!
- HRZ6 years ago
Frequent Contributor
You should probably read this document:
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an776.pdf