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ost's avatar
ost
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3 years ago

Simple standalone IP using oneAPI?

I wonder if oneAPI is able to generate a standalone IP block with defined IO ports, just like HLS can do. I have been playing with the oneAPI compiler examples, and it appears like the compiler can j...
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ost's avatar
ost
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3 years ago

Alright, I got to read the example, and there are several unclear issues to me.

Yes, it appears like I can attach this adder IP to some memory mapped host interface. I can also export this OutputPipe (sourcecode) class to a mysterious memory mapped agent interface (called add_report_di_0_csr_ring_root_avs), but only drivers and software will (may?) explain how this mapping works out. As a mainly FPGA skilled man, I honestly did not expect a pipe to instantiate as a memory mapped interface.

There is a lot of mystery in this. Since I (at this time) care less about hooking the IP to a memory mapped host, I would like to know how I can get scalar IO (both in and out), and HLS compatible stream interfaces, also both in and out from oneAPI coding. Keep in mind I want to write code that mainly resolves to II=1, so memory mapping interfaces are not very interesting.

Also, I am curious to know what is, and how I can control the IRQ sender and exception bus that is generated from the code.

Can you help? Should I just stay with HLS for what I want to do?

Best regards,