I'm working on a PR related project, and I plan to raise the abstraction level to HLD using oneAPI. I'm thinking of what is the typical workflow to utilize PR in a oneAPI design. # example applicat...
oneAPI FPGA Acceleration does Partial Reconfiguration for you, depending on the BSP.
BSPs crafted using OFS will have a structure like in this graphic (from the OFS documentation). As you can see, there is a PR region that contains your kernel code. The BSP is 'logic-locked' and your Application Kernel is counted as the 'PR region'.
I'm not sure if it's still the case, but there used to be an option for a 'flat compile' that would also recompile the 'logic-locked' region as well. this could sometimes help in cases where the kernel was large.
Regarding the last info about flat flow: The true flat flow (which means no PR and was offered in the legacy BSP design) is not there in the OFS based oneapi-asp design. The oneapi-asp + oneAPI kernel lies in the AFU region which is in the PR slot.