Nafiah,
What it is that you are trying to accomplish? I haven't used MCTP directly, just the OPAE tools (i.e. fpgainfo, fpgasupdate, ...) which use this to communicate to the Max10 on the N6000 board.
For the N6000 and N6001 boards, the logic should be added by default. You should see "INCLUDE_PCMI" in the ofs_top.qsf file
One thing to take a look at is the register map (PMCI_IOFS).
https://github.com/OFS/ofs-agx7-pcie-attach/blob/599ac052eafbc9cede22561c099233ae4a54cb7d/ipss/pmci/PMCI-CSR.xlsx
I also see an example here for accessing the PCMI registers:
https://ofs.github.io/ofs-2025.1-1/hw/n6001/doc_modules/n6001_wt_set_up_jtag
The base address is 0x20000 (PMCI controller) and using offset 0x400 to access the SPI Master to the Max10
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