Issues HPS OpenCL Enviroment writeup.
Issue writeup regarding HPS OpenCL.
1: Linux issue.
As mentioned in Ticket:
https://forums.intel.com/s/question/0D50P00004PK4DESA1/opencl-bsp-hps-are-updated-opencl-drivers-libs-for-newer-linux-kernels-available-
The FPGA Bridge handling for the AXI Bridges is changed in Kernel versions 4 upward and no Update is planned....!!
The Issue is known since 2016. ( see link of the Rocketboards Forum: https://forum.rocketboards.org/t/missing-dev-fpga0-device-on-de0-nano-soc/526)
The info «You can use Kernel 3.10 LTS» does not help due multiple reasons.
1. 3.10 is outdated and has security flaws.
2. Intel itself removed all SOCFPGA sources regarding 3.X Kernels, see attached screenshot.
3. Our Host Software does not run on Kernel lower than 4.
The issue hereby ist hat the Partial Reconfiguration can not be used. So every time i want to run the System it tries to AOCL Program the device and it fails due the fact that the AXI Bridges are not existing in expected pre 4 kernel behaviour.
This renderst he HPS OpenCL at the moment Unusable besides the AOCL Diagnose.
Issue 2
AOC / MMD Driver Issue.
We use a design without shared memory. See attached screenshot.
The HPS uses its own 2 / 4 GB Memory for the Linux System. The FPGA has ist own 4GB attached through a second Memory controller. Connection is only via the lw AXI and the HPS to FPGA AXI Bridge.
The Driver has an option for non DMA access as i read through the Sourcecodes but couldnt enable it. The following happened. :
AOCL Diagnose shows the FPGA perfectly fine with ID and everything.
AOCL Diagnose acl0 which starts the memory test starts fine till a specific memory border which indicates that the driver still runs in shared memory mode.
We need the Driver in non shared memory mode.
Compiled Experimenrts, sources, card images and logs are available on PM