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MFeng5's avatar
MFeng5
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6 years ago

Intel的PAC卡在开发过程中,使用remote signal tap进行时,在本地执行如下命令报错。

是使用方法不正确?

20 Replies

  • JohnT_Altera's avatar
    JohnT_Altera
    Icon for Regular Contributor rankRegular Contributor

    Hi,

    You can use Quartus to achieve the project which include all revision.

  • User1582192733150209's avatar
    User1582192733150209
    Icon for Occasional Contributor rankOccasional Contributor

    Hi ​JohnT,

    finally I got it works now.now signaltap can remotely capture data now.

    the reason is that

    after I put 2 assignments into afu.qsf

    set_global_assignment -name ENABLE_SIGNALTAP ON

    set_global_assignment -name USE_SIGNALTAP_FILE "../../hw/par/A10/stp_basic.stp"

    those above 2 assignmetn supposed be done by extra_tcl-0_stp.tcl

    but if you check the path in extra_tcl-0_stp.tcl you will find the path is wrong

    set_global_assignment -name USE_SIGNALTAP_FILE ../hw/par/A10/stp_basic.stp.

    the correct one is

    set_global_assignment -name USE_SIGNALTAP_FILE "../../hw/par/A10/stp_basic.stp"

    the wrong one made stp file can not be included during the compilation, that is why stp always reported Can't find the instance. Download a design with SRAM Object File containing this instance.

    that original extra_tcl-0_stp.tcl is provided by vendor, I have not changed it. that is root cause.

    thanks for your help.

    I think many other customer would duplicate same issue, if they follow the instruction from page 35 in chapter 6 AFU in-system debug of AFU Developer’s Guide for Intel FPGA Programmable Acceleration Card.

    thanks all your help.

    Best regard

    Jim

  • User1582192733150209's avatar
    User1582192733150209
    Icon for Occasional Contributor rankOccasional Contributor

    I Share my project here with everyone for reference.

    but when I was doing achieve project with ticking all version, system reported an error

    Error(16368): Top-level design entity "dcp_top" is undefined

    anyway I attached my project here, anyone wants single other file can email to me jimlinmake@hotmail.com.

    thanks

    jim

  • JohnT_Altera's avatar
    JohnT_Altera
    Icon for Regular Contributor rankRegular Contributor

    Hi,

    Thanks for sharing. I would recommend to always check on the Quartus report to confirm STP is included and compiled into your design so that the SignalTap is able to run.

  • User1582192733150209's avatar
    User1582192733150209
    Icon for Occasional Contributor rankOccasional Contributor

    Hi JohnT,

    thanks for that, May I know which report and which part in that report should be check for confirming the stp is included?

    any key words can be use to search ? I think this is very useful,

    thanks

    Jim

  • User1582192733150209's avatar
    User1582192733150209
    Icon for Occasional Contributor rankOccasional Contributor

    Hi JohnT,

    I have checked the file afu_fit.fit.rpt,which is 137.9MB, it is too long and too big.

    I have not fund signaltap relative information,which can be use to indicate if sitnaltap file is included or not.

    thanks

    jim

  • JohnT_Altera's avatar
    JohnT_Altera
    Icon for Regular Contributor rankRegular Contributor

    Hi,

    If you look into fit.rpt, you will observed "inst_SLD_HUB_cont_sys" which is usually the SignalTap resource and in .synth.rpt, you will observed .stp file being included into your design.

  • User1582192733150209's avatar
    User1582192733150209
    Icon for Occasional Contributor rankOccasional Contributor

    Hi JohnT,

    I have found my stp file is in the section source files read of ​afu_synth.syn.rpt, looks like stp file is included by compilation flow.

    thanks for your help

    Jim