Intel的PAC卡在开发过程中，使用remote signal tap进行时，在本地执行如下命令报错。

​Hi JohnT,

1, I check the filelist_mode_0_stp.txt as below

+define+INCLUDE_REMOTE_STP

C:filelist_mode_0.txt

QI:../par/${OPAE_PLATFORM_FPGA_FAMILY}/extra_tcl-0_stp.tcl

../par/nlb_0_stp.sdc

2, Also I check the filelist_base.txt

+define+BIST_AFU

nlb_400.json

test_sw1.sv

test_rdwr.sv

test_lpbk1.sv

requestor.sv

nlb_lpbk.sv

nlb_csr.sv

nlb_C1Tx_fifo.sv

ccip_std_afu.sv

ccip_interface_reg.sv

ccip_debug.sv

arbiter.sv

nlb_gram_sdp.v

pipeline.sv

platform/${OPAE_PLATFORM_FPGA_FAMILY}/local_mem.sv

resync.v

altera_std_synchronizer_nocut.v

QSYS_IPs/${OPAE_PLATFORM_FPGA_FAMILY}/RAM/req_C1TxRAM2PORT.qsys

QSYS_IPs/${OPAE_PLATFORM_FPGA_FAMILY}/RAM/lpbk1_RdRspRAM2PORT.qsys

include_files/common

../par/stp_basic.stp

../par/nlb_0_stp.sdc

which means, signaltap remote debug has been enabled .

above file including gbs, txt,tcl,stp are unchanged vendor original design example.

just can not active stp according the vendor's example.

thanks

jim