How to compile 534 simplified lines?

Hi Vinicius,

Sexual problem detected. -------- In Intel FPGA community we support only FPGA development & devices related issues so rest of things you need to take care.

Ask your boss: << do you see six attachments? Because Vinicius sees six attachments since December Eleventh. >> ------- Sure.

I'm using Altera Quartus 13, 64 bits for web.

Please, forward it to he who makes quartus next release. ----------- Have you verified with latest Quartus version? please provide specific error/issue.

https://fpgasoftware.intel.com/18.1/?edition=lite&platform=windows

People in Intel community are not here to simplify or analyze your projects, they will help you to narrow down your issues if you cooperate them.

Now I would like to suggest,

1. Try to compile first your design without error In Quartus latest version & provide screenshot & if you face any error, let us know.
2. Once it compile successfully then verify it by writing the testbench & tracing waveform.
3. Then take backup of it & try to simplify with proper HDL syntax & language constraints.
4. If you need any online training please go through the below link,

https://www.intel.com/content/www/us/en/programmable/support/training/catalog.html

Regards,

Vicky