Forum Discussion

New Contributor

2 years ago

HLS Avalon interface data width implementable only with 2^N numbers

Hi, this is about a second issue we have while migrating an IP core from HLS workflow to new sycl HLS tools (first is here, might be related but this one stand s for its own as well) . The HLS defin...

streaming_data_interfaces_mod.zip2 KB

Compilation

aikeu

Regular Contributor

2 years ago

Hi Ric2,

Avalon has always required an empty signal when multiple symbols were present.

https://www.intel.com/content/www/us/en/docs/programmable/683091/22-3/signal-details-78878.html

I think you have reach out to White Paul regarding further question. I will close the thread for now.

Thanks.

Regards,

Aik Eu

Forum Discussion

HLS Avalon interface data width implementable only with 2^N numbers

Recent Discussions

This is a test post

Agilex 7 M series Open FPGA Stack support

Deprecation Notice for FPGA Support Package for oneAPI DPC++/C++. What is the alternative?

Agilex 7 I-Series "aocl diagnose acl0" error following OFS

OneAPI Support for Agilex 5 and 7 Development Kits