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NickM's avatar
NickM
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5 years ago

Double Precision IEEE 754 Division on FPGA

Hello,

I was trying to find out if it is possible to force hardware to produce a IEEE 754 compliant division unit for double precision floats. Currently the design defaults to "faithful rounding".

1 Reply

  • GouthamK_Intel's avatar
    GouthamK_Intel
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    5 years ago

    Hi,


    As your issue is related to FPGA, we are moving your case to FPGA forum for quicker response.


    Thanks

    Goutham