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travisa's avatar
travisa
Icon for New Contributor rankNew Contributor
3 years ago

Creating a new API for an FPGA design with Data Generator IP

Hi, I am working on a hardware design in my DE5A-NET-DDR4 fpga using the Quartus Prime Pro tool. In the system builder, I have the Intel Data Generator IP. I have to have an API in my host computer...
Jeet14's avatar
Jeet14
Icon for Frequent Contributor rankFrequent Contributor
2 years ago

Hi,


I further checked on the .DLL files.

Unfortunately, there is no .DLL for the IP block you have mentioned.

You may need to use the JTAG to Avalon Master bridge and system console to perform this action.


Let me know if you have any other question on this case.


Regards

Jeetesh