Forum Discussion
FakhrulA_altera
Regular Contributor
5 months agoHi aiedb,
From my understanding - To answer your question, no, the CRC16 at the end of the .pof isn’t calculated from your VHDL design directly. It’s generated when you build the .pof, mainly for the Quartus programmer to check file integrity during programming. This CRC16 doesn’t get written into the CFM sectors, so you can’t read it from the device later. Basically, it’s just for checking the .pof file itself, not stored inside the FPGA.
Regards,
Fakhrul