Forum Discussion

MN_'s avatar
MN_
Icon for New Contributor rankNew Contributor
7 years ago

Can I read and write buffers simultaneously with OpenCL.

Hello, I am using the FPGA board de5net from Terasic with a Stratix V FPGA. It is connected the to host via PCIe. To obtain a hight throughput I want to read an write buffers simultaneously but unf...
MN_'s avatar
MN_
Icon for New Contributor rankNew Contributor
7 years ago

@NYusof

Do you know, if Intel plans to support OpenCL PCIe 16x gen3 in future, and if yes, when do you think it's available?

Thanks

MN

Nooraini_Y_Intel's avatar
Nooraini_Y_Intel
Icon for Frequent Contributor rankFrequent Contributor
7 years ago

Hi @MUsman​

Can you help to address this question from @MN.​ ?

"Do you know, if Intel plans to support OpenCL PCIe 16x gen3 in future, and if yes, when do you think it's available?"

Thank you,

Regards,

Nooraini

  • MuhammadAr_U_Intel's avatar
    MuhammadAr_U_Intel
    Icon for Contributor rankContributor
    7 years ago

    Looking at the Stratix10 Devkit initialization guide provided with latest version ofcompiler 18.1, I can see the "aocl diagnose" result shows Gen3x8.

    We don't have information when PCIe Gen3 x16 will be supported.

    Thanks,

    Arslan