Hi,
1. Are the handbook AGX7 IP+Host numbers measured using S2M streaming architecture or M2M ?
The Agilex 7 performance is based on the PCIe + FPGA AI Suite IP benchmarking. This benchmarking will be different compare to the HPS method as the CPU use it higher performance compare to the HPS processor. With S2M implementation, it is relying on the Nios V to offload the HPS task.

2. Is there a recommended method to measure true end-to-end throughput on AGX5 ?
Do you need the full system performance throughput? If yes, what type of implementation are you looking at as the current implementation might not be suitable to showcase the throughput of the full system.
3.Are there any known bottlenecks in the Agilex 5 SoC Example Design S2M Bitstream and SD Card Image.
The current S2M implementation is to emulate the data by copying the data to buffer before it is being stream into the FPGA AI Suite IP. In order to have the real throughput for the S2M implementation, the streaming data will need to directly pass it to the FPGA AI Suite.
You may refer to https://altera-fpga.github.io/rel-25.3.1/embedded-designs/agilex-5/e-series/modular/camera/camera_4k_ai/camera_4k_ai/ which implemented a direct data input to the FPGA without the use of the ARM processor to send the data to the streaming buffer.
Thanks