liny
New Contributor
New Contributoragilex compiles fim error on n6000
hello
I am using n6000 for accelerated development. According to the provided documentation, I compile a fim that can be used for pr, but after deploying the environment, run the command syn/build_top.sh n6000/base_x16/adp:no_hssi work_n6000_base_x16_adp__no_hssi to generate a fim, and it appears error.
Error (13305): Verilog HDL error at pcie_ss_top.sv(294): can't find port "p0_ss_app_st_ctrlshadow_tvalid" File: /home/video/work/intel/ofs/iofs_fim_build_root/intel-ofs-fim/work_n6000_base_x16_adp__no_hssi/ipss/n6000 /pcie/rtl/pcie_ss_top.sv Line: 294
Error (13305): Verilog HDL error at pcie_ss_top.sv(295): can't find port "p0_ss_app_st_ctrlshadow_tdata" File: /home/video/work/intel/ofs/iofs_fim_build_root/intel-ofs-fim/work_n6000_base_x16_adp__no_hssi/ipss/n6000 /pcie/rtl/pcie_ss_top.sv Line: 295
Error (13305): Verilog HDL error at pcie_ss_top.sv(298): can't find port "p0_ss_app_st_cplto_tvalid" File: /home/video/work/intel/ofs/iofs_fim_build_root/intel-ofs-fim/work_n6000_base_x16_adp__no_hssi/ipss/n6000 /pcie/rtl/pcie_ss_top.sv Line: 298
Error (13305): Verilog HDL error at pcie_ss_top.sv(299): can't find port "p0_ss_app_st_cplto_tdata" File: /home/video/work/intel/ofs/iofs_fim_build_root/intel-ofs-fim/work_n6000_base_x16_adp__no_hssi/ipss/n6000 /pcie/rtl/pcie_ss_top.sv Line: 299
Error (16186): Can't elaborate top-level user hierarchy
Error: Flow failed: 0x305f9a00
Error: Quartus Prime Synthesis was unsuccessful. 6 errors, 106 warnings
Error (13305): Verilog HDL error at pcie_ss_top.sv(295): can't find port "p0_ss_app_st_ctrlshadow_tdata" File: /home/video/work/intel/ofs/iofs_fim_build_root/intel-ofs-fim/work_n6000_base_x16_adp__no_hssi/ipss/n6000 /pcie/rtl/pcie_ss_top.sv Line: 295
Error (13305): Verilog HDL error at pcie_ss_top.sv(298): can't find port "p0_ss_app_st_cplto_tvalid" File: /home/video/work/intel/ofs/iofs_fim_build_root/intel-ofs-fim/work_n6000_base_x16_adp__no_hssi/ipss/n6000 /pcie/rtl/pcie_ss_top.sv Line: 298
Error (13305): Verilog HDL error at pcie_ss_top.sv(299): can't find port "p0_ss_app_st_cplto_tdata" File: /home/video/work/intel/ofs/iofs_fim_build_root/intel-ofs-fim/work_n6000_base_x16_adp__no_hssi/ipss/n6000 /pcie/rtl/pcie_ss_top.sv Line: 299
Error (16186): Can't elaborate top-level user hierarchy
Error: Flow failed: 0x305f9a00
Error: Quartus Prime Synthesis was unsuccessful. 6 errors, 106 warnings
Has anyone encountered this problem and give me some advice?
thanks
The problem has been solved, reinstalling the documentation requires the fim to be down and the quartus to be installed. It may be caused by the mismatch between fim and quartus
thankyou
